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Freescale Semiconductor Advance Information
Document Number: MC33399 Rev. 8.0, 10/2006
Local Interconnect Network (LIN) Physical Interface
Local Interconnect Network (LIN) is a serial communication protocol designed to support automotive networks in conjunction with Controller Area Network (CAN). As the lowest level of a hierarchical network, LIN enables cost-effective communication with sensors and actuators when all the features of CAN are not required. The 33399 is a Physical Layer component dedicated to automotive sub-bus applications. It offers speed communication from 1.0 kbps to 20 kbps, and up to 60 kbps for Programming Mode. It has two operating modes: Normal and Sleep. The 33399 supports LIN Protocol Specification 1.3. Features * Nominal Operation from VSUP 7.0 V to 18 V DC, Functional up to 27 V DC Battery Voltage and Capable of Handling 40 V During Load Dump * Active Bus Waveshaping to Minimize Radiated Emission * 5.0 kV ESD on LIN Bus Pin, 4.0 kV ESD on Other Pins * 30 k Internal Pullup Resistor * Ground Shift Operation and Ground Disconnection Fail-Safe at Module Level * An Unpowered Node Does Not Disturb the Network * 20 A in Sleep Mode * Wake-Up Capability from LIN Bus, MCU Command and Dedicated High Voltage Wake-Up Input (Interface to External Switch) * Interface to MCU with CMOS-Compatible I/O Pins * Control of External Voltage Regulator * Pb-FREE packaging designated by package code EF
33399
LIN PHYSICAL INTERFACE
D SUFFIX EF SUFFIX (PB-FREE) 98ASB42564B 8 PIN SOICN
ORDERING INFORMATION
Device MC33399D/R2 - 40C to 125C MCZ33399EF/R2 8 SOICN Temperature Range (TA) Package
V PWR
Regulator 12 V 5.0 V
33399
VSUP INH EN WAKE GND
MCU
TXD RXD
LIN
LIN Bus
Figure 1. 33399 Simplified Application Diagram
* This document contains certain information on a new product. Specifications and information herein are subject to change without notice.
(c) Freescale Semiconductor, Inc., 2006. All rights reserved.
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
WAKE
VSUP
INF EN
Wake-Up VREG Control
VREF Bias
30 k
Logic
RXD Protection
Receiver LIN
TXD
Driver
GND
Figure 2. 33399 Simplified Internal Block Diagram
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PIN CONNECTIONS
PIN CONNECTIONS
RXD EN WAKE TXD 1 2 3 4 8 7 6 5 INH VSUP LIN GND
Figure 3. 33399 8-SOICN Pin Connections Table 1. 8-SOICN Pin Definitions A functional description of each pin can be found in the Functional Pin Description section beginning on page 10.
Pin 1 2 3 4 5 6 7 8 Pin Name RXD
EN WAKE
Formal Name Data Output Enable Control Wake Input Data Input Ground LIN Bus Power Supply Inhibit Output
Definition MCU interface that reports the state of the LIN bus voltage. Controls the operation mode of the interface. High voltage input used to wake up the device from the Sleep mode. MCU interface that controls the state of the LIN output. Device ground pin. Bidirectional pin that represents the single-wire bus transmitter and receiver. Device power supply pin. Controls an external switchable voltage regulator having an inhibit input.
TXD
GND
LIN VSUP
INH
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ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device.
Rating ELECTRICAL RATINGS Power Supply Voltage Continuous Supply Voltage Transient Voltage (Load Dump) WAKE DC and Transient Voltage (Through a 33 k Serial Resistor) Logic Voltage (RXD, TXD, EN Pins) LIN Pin DC Voltage Transient (Coupled Through 1.0 nF Capacitor) INH Voltage / Current DC Voltage ESD Voltage, Human Body Model (1) All Pins LIN Bus Pin with Respect to Ground ESD Voltage, Machine Model All Pins THERMAL RATINGS Operating Temperature Ambient Junction Storage Temperature Thermal Resistance, Junction to Ambient Peak Package Reflow Temperature During Reflow Thermal Shutdown Thermal Shutdown Hysteresis
(2) (3)
Symbol
Value
Unit
VSUP 27 40 VWAKE VLOG VBUS - 18 to 40 - 150 to 100 - 18 to 40 - 0.3 to 5.5
V
V V V
VINH V ESD1
- 0.3 to VSUP + 0.3
V V
4000 5000 V ESD2 200 V
C TA TJ TSTG RJA , TPPRT TSHUT THYST - 40 to 125 - 40 to 150 - 55 to 165 150 Note 3. 150 to 200 8.0 to 20 C C/W C C C
Notes 1. ESD1 testing is performed in accordance with the Human Body Model (CZAP = 100 pF, RZAP = 1500 ), ESD2 testing is performed in accordance with the Machine Model (CZAP = 220 pF, RZAP = 0 ). 2. 3. Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may cause malfunction or permanent damage to the device. Freescale's Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow Temperature and Moisture Sensitivity Levels (MSL), Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics.
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ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics Characteristics noted under conditions 7.0 V VSUP 18 V, -40C TA 125C, GND = 0 V unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25C under nominal conditions unless otherwise noted.
Characteristic VSUP PIN (DEVICE POWER SUPPLY) Supply Voltage Range Supply Current in Sleep Mode VLIN > VSUP - 0.5 V, VSUP < 14 V 14 V < VSUP < 18 V Supply Current in Normal Mode Recessive State Dominant State, Total Bus Load > 500 Supply Undervoltage Threshold RXD OUTPUT PIN (LOGIC) Low-Level Output Voltage IIN 1.5 mA High-Level Output Voltage IOUT 250 TXD INPUT PIN (LOGIC) Low-Level Input Voltage High-Level Input Voltage Input Voltage Threshold Hysteresis Pullup Current Source 1.0 V < VTXD < 4.0 V, VEN = 5.0 V EN INPUT PIN (LOGIC) Low-Level Input Voltage High-Level Input Voltage Input Voltage Threshold Hysteresis EN Low-Level Input Current VIN = 1.0 V High-Level Input Current VIN = 4.0 V Pulldown Current 1.0 V < EN < 4.0 V IPD -- 20 -- IIH -- 20 40 A VIL VIH VINHYST IIL 5.0 20 30 A -- 3.5 100 -- -- 480 1.5 -- 800 V V mV A VIL VIH VINHYST IPU - 50 -- - 25 -- 3.5 100 -- -- 550 1.5 -- 800 V V mV A VOL 0.0 VOH 3.75 -- 5.25 -- 0.9 V V IS(REC) IS(DOM) VSUP_UV -- -- 5.5 -- -- 6.4 2.0 3.0 6.8 V IS1 IS2 -- -- 20 -- 50 150 mA VSUP 7.0 13.5 18 V A Symbol Min Typ Max Unit
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ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics (continued) Characteristics noted under conditions 7.0 V VSUP 18 V, -40C TA 125C, GND = 0 V unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25C under nominal conditions unless otherwise noted.
Characteristic LIN PIN (VOLTAGE EXPRESSED VERSUS VSUP VOLTAGE) Low-Level Bus Voltage (Dominant State) TXD LOW, VLIN = 40 mA High-Level Voltage (Recessive State) TXD HIGH, IOUT = 1.0 A Internal Pullup Resistor to VSUP (4) - 40C TA 70C 70C < TA 125C Current Limitation TXD LOW, VLIN = VSUP Leakage Current to GND Recessive State, VSUP - 0.3 V VLIN VSUP
(4)
Symbol
Min
Typ
Max
Unit
VDOM 0.0 VREC 0.85 VSUP RPU 20 35 I LIM 50 I LEAK 0.0 - 40 -- -- V LINL 0 VSUP V LINH 0.6 VSUP V LINTH -- V LINHYS 0.05 VSUP V LINWU 3.5 -- 4.5 0.15 VSUP 6.0 VSUP/2 -- -- VSUP -- 0.4 VSUP -- -- - 600 15 10 40 -- -- 150 200 30 49 47 60 -- -- -- 1.4
V
V
k
mA
A
VSUP Disconnected, -18 V VLIN 18 V (Excluding Internal Pullup Source) VSUP Disconnected, VLIN = -18 V (Including Internal Pullup Source) VSUP Disconnected, VLIN = +18 V (Including Internal Pullup Source) LIN Receiver, Low-Level Input Voltage TXD HIGH, RXD LOW LIN Receiver, High-Level Input Voltage TXD HIGH, RXD HIGH LIN Receiver Threshold Center (VLINH - VLINL) / 2 LIN Receiver Input Voltage Hysteresis VLINH - VLINL LIN Wake-Up Threshold Voltage INH OUTPUT PIN High-Level Voltage (Normal Mode) Leakage Current (Sleep Mode) 0 < VINH < VSUP WAKE INPUT PIN Typical Wake-Up Threshold (EN = 0 V, 7.0 V VSUP 18 V) (5) HIGH-to-LOW Transition LOW-to-HIGH Transition Wake-Up Threshold Hysteresis WAKE Input Current VWAKE 14 V VWAKE > 14 V VWUHYS I WU VWUTH VWUH I LEAK
V
V
V
V
V
VSUP - 0.8
--
VSUP
V A
0
--
5.0
V 0.3 VSUP 0.4 VSUP 0.1 VSUP 0.43 VSUP 0.55 VSUP 0.16 VSUP 0.55 VSUP 0.65 VSUP 0.2 VSUP V A -- -- 1.0 -- 5.0 100
Notes 4. A diode structure is inserted with the pullup resistor to avoid parasitic current path from LIN to VSUP. 5. 33399 When VSUP is greater than 18 V, the wake-up voltage thresholds remain identical to the wake-up thresholds at 18 V.
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ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. Dynamic Electrical Characteristics Characteristics noted under conditions 7.0 V VSUP 18 V, -40C TA 125C, GND = 0 V unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25C under nominal conditions unless otherwise noted.
Characteristic DIGITAL INTERFACE TIMING LIN Slew Rate (6) , (7) Falling Edge Rising Edge LIN Rise/Fall Symmetry (t RISE - t FALL) Driver Propagation Delay
(8) , (9)
Symbol
Min
Typ
Max
Unit
V/s t FALL t RISE t SYM 0.75 0.75 - 2.0 2.0 2.0 -- 3.0 3.0 2.0 s s t TXDLINL t TXDLINH
(9) , (10)
TXD LOW-to-LIN LOW TXD HIGH-to-LIN HIGH Receiver Propagation Delay LIN LOW to RXD LOW LIN HIGH to RXD HIGH Receiver Propagation Delay Symmetry Transmitter Propagation Delay Symmetry Propagation Delay
(11)
0.0 0.0
-- --
4.0 4.0 s
t RXDLINL t RXDLINH
t RECSYM t TRSYM t PROPWL
2.0 2.0 - 2.0 - 2.0
4.0 4.0 -- --
6.0 6.0 2.0 2.0 s s s
LIN Bus Wake-Up to INH HIGH
45
70
130
Notess 6. Measured between 20 and 80 percent of bus signal for 10 V < VSUP < 18 V. Between 30 and 70 percent of signal for 7.0 V < VSUP < 10 V. 7. 8. 9. 10. 11. See Figure 5, page 8. t TXDLINL is measured from TXD (HIGH-to-LOW) and LIN (VREC - 0.2 V). t TXDLINH is measured from TXD (LOW-to-HIGH) and LIN (VDOM + 0.2 V). See Figure 4, page 8. Measured between LIN receiver thresholds and RXD pin. See Figure 6, page 8.
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ELECTRICAL CHARACTERISTICS TIMING DIAGRAMS
TIMING DIAGRAMS
TXD Recessive State VREC LIN t TXDLINL 0.4 VSUP VDOM Dominant State RXD VREC - 0.2 V
Recessive State
0.6 VSUP
VDOM + 0.2 V
t RXDLINH
t TXDLINH
t RXDLINL
Figure 4. Normal Mode Bus Timing Characteristics
t FALL 0.8 VSUP
0.2 VSUP t RISE 0.8 VSUP
Recessive State VSUP LIN 0.4 VSUP Dominant State INH
0.2 VSUP
t PROPWL
Figure 5. LIN Rise and Fall Time
Figure 6. LIN Bus Wake-Up
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FUNCTIONAL DIAGRAMS TIMING DIAGRAMS
FUNCTIONAL DIAGRAMS
WAKE
LIN Bus
State Change
INH
Low or Floating
High
INH
Low or Floating WAKE Filtering Time
High
Bus Wake-Up Filtering Time (t PROGWL) Voltage Regulator On State Off State Regulator Wake-Up Time Delay EN Node in Operation EN High MCU Startup Time Delay
Voltage Regulator
On State Off State Regulator Wake-Up Time Delay Node in Operation EN High MCU Startup Time Delay
EN
Node in Sleep State
Node in Sleep State
Figure 7. LIN Wake-Up with INH Option
Figure 8. LIN Wake-Up from Wake-Up Switch
LIN Bus
INH (previous Wake-Up)
Low or Floating
High
Wake-Up Filtering Time (t PROGWL) Voltage Reg On State Wake-Up from Stop Mode EN State MCU in Stop Mode Node In Operation EN High MCU Stop Mode Recovery/Startup Time Delay
I/O(2)
High Impedance / I/O in Input State
Low
IRQ
High
Low
High
Figure 9. LIN Wake-Up with MCU in Stop Mode
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FUNCTIONAL DESCRIPTION TIMING DIAGRAMS
FUNCTIONAL DESCRIPTION
INTRODUCTION
The 33399 is a Physical Layer component dedicated to automotive LIN sub-bus applications. The 33399 features include speed communication from 1.0 kbps to 20 kbps, up to 60 kbps for Programming Mode, and active bus waveshaping to minimize radiated emission. The device offers three different wake-up capabilities: wake-up from LIN bus, wake-up from the MCU command, and dedicated high voltage wake-up input. The INH output may be used to control an external voltage regulator.
FUNCTIONAL PIN DESCRIPTION POWER SUPPLY PIN (VSUP)
The VSUP power supply pin is connected to a battery through a serial diode for reverse battery protection. The DC operating voltage is from 7.0 V to 27 V. This pin sustains standard automotive voltage conditions such as 27 V DC during jump-start conditions and 40 V during load dump. To avoid a false bus message, an undervoltage reset circuitry disables the transmission path (from TXD to LIN) when VSUP falls below 7.0 V. Supply current in the Sleep mode is typically 20 A. This charge-up is achieved by the total system pullup current resistors. In order to guarantee that the rise time is within specification, maximum bus capacitance should not exceed 10 nF with bus total pullup resistance less than 1.0 k. Receiver Characteristics The receiver thresholds are ratiometric with the device supply pin. Typical threshold is 50%, with a hysteresis between 5% and 10% of VSUP.
DATA INPUT PIN (TXD) GROUND PIN (GND)
In case of a ground disconnection at the module level, the 33399 does not have significant current consumption on the LIN bus pin when in the recessive state. (Less than 100 A is sourced from LIN bus pin, which creates 100 mV drop voltage from the 1.0 k LIN bus pullup resistor.) For the dominant state, the pullup resistor should always be active. The 33399 handles a ground shift up to 3.0 V when VSUP > 9.0 V. Below 9.0 V VSUP, a ground shift can reduce VSUP value below the minimum VSUP operation of 7.0 V. The TXD input pin is the MCU interface that controls the state of the LIN output. When TXD is LOW, LIN output is LOW; when TXD is HIGH, the LIN output transistor is turned OFF. This pin has an internal 5.0 V internal pullup current source to set the bus in a recessive state in case the MCU is not able to control it; for instance, during system power-up/ power-down. During the Sleep mode, the pullup current source is turned OFF.
DATA OUTPUT PIN (RXD) LIN BUS PIN (LIN)
The LIN bus pin represents the single-wire bus transmitter and receiver. Transmitter Characteristics The LIN driver is a low-side MOSFET with internal current limitation and thermal shutdown. An internal pullup resistor with a serial diode structure is integrated so no external pullup components are required for the application in a slave node. An additional pullup resistor of 1.0 k must be added when the device is used in the master node. Voltage can go from - 18 V to 40 V without current other than the pullup resistance. The LIN pin exhibits no reverse current from the LIN bus line to VSUP, even in the event of GND shift or VPWR disconnection. LIN thresholds are compatible with the LIN protocol specification. The fall time from recessive to dominant and the rise time from dominant to recessive are controlled to typically 2.0 V/s. The symmetry between rise and fall time is also guaranteed. When going from dominant to recessive, the bus impedance parasitic capacitor must be charged up to VSUP. The RXD output pin is the MCU interface that reports the state of the LIN bus voltage. LIN HIGH (recessive) is reported by a high level on RXD; LIN LOW (dominant) is reported by a low voltage on RXD. RXD output structure is a CMOS-type push-pull output stage.
ENABLE INPUT PIN (EN)
The EN pin controls the operation mode of the interface. If EN = logic [1], the interface is in normal mode, with the transmission path from TXD to LIN and from LIN to RXD both active. If EN = logic [0], the device is in Sleep mode or low power mode, and no transmission is possible. In Sleep mode, the LIN bus pin is held at VSUP through the bus pullup resistors and pullup current sources. The device can transmit only after being awakened. Refer to the INHIBIT OUTPUT PIN (INH) description on page 11. During Sleep mode, the device is still supplied from the battery voltage (through VSUP pin). Supply current is 20 A typical. Setting the EN pin to LOW will turn the INH to high impedance. The EN pin has an internal 20 A pulldown current source to ensure the device is in Sleep mode if EN floats.
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FUNCTIONAL DESCRIPTION TIMING DIAGRAMS
INHIBIT OUTPUT PIN (INH)
The INH pin controls an external switchable voltage regulator having an inhibit input. This pin is a high-side switch structure to VSUP. When the device is in the Normal mode, the inhibit high-side switch is turned ON and the external voltage regulator is activated. When the device is in Sleep mode, the inhibit switch is turned OFF and disables the voltage regulator (if this feature is used). A wake-up event on the LIN bus line will switch the INH pin to VSUP level. Wake-up output current capability is limited to 280 A. INH can also drive an external MOSFET connected to an MCU IRQ or XIRQ input to generate an interrupt. See the typical application illustrated in Figure 13, page 15.
WAKE INPUT PIN (WAKE)
The WAKE pin is a high-voltage input used to wake up the device from Sleep mode. WAKE is usually connected to an external switch in the application. The typical WAKE thresholds are VSUP / 2. The WAKE pin has a special design structure and allows wake-up from both HIGH-to-LOW or LOW-to-HIGH transitions. When entering the Sleep mode, the LIN monitors the state of the WAKE pin and stores it as a reference state. The opposite state of this reference state will be the wake-up event used by the device to re-enter Normal mode. An internal filter is implemented (50 s typical filtering time delay). The WAKE pin input structure exhibits a high impedance with extremely low input current when voltage at this pin is below 14 V. When voltage at the WAKE pin exceeds 14 V, input current starts to sink into the device. A series resistor should be inserted in order to limit the input current, mainly during transient pulses. Recommended resistor value is 33 k. Important The WAKE pin should not be left open. If the wake-up function is not used, WAKE should be connected to GND to avoid false wake-up.
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FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
As described below and depicted in Figure 10 and Table 5 on page 13, the 33399 has two operational modes, normal and sleep, and one transitional mode, Awake. * LIN bus activity * Internal node wake-up (EN pin) * Wake-up from WAKE pin Figures 7, 8, and 9 on page 9 show device application circuit and detail of wake-up operations. Wake-Up from LIN Bus (Awake Transitional Mode) A wake-up from the LIN pin switching from recessive to dominant state (switch from VSUP to GND) can occur. This is achieved by a node sending a wake-up frame on the bus. This condition internally wakes up the interface, which switches the INH pin to a HIGH level to enable the voltage regulator. The device switches into the Awake mode. The microcontroller and the complete application power up. The microcontroller must switch the EN pin to a HIGH level to allow the device to leave the Awake mode and turn it into Normal mode in order to allow communication on the bus. Wake-Up from Internal Node Activity (Normal Mode) The application can internally wake up. In this case the microcontroller of the application sets the EN pin in the HIGH state. The device switches into Normal mode. Wake-Up from WAKE Pin (Awake Transitional Mode)
NORMAL MODE
This is the normal transmitting and receiving mode. All features are available.
SLEEP MODE
In this mode the transmission path is disabled and the device is in low power mode. Supply current from VSUP is 20 A typical. Wake-up can occur from LIN bus activity, as well as from node internal wake-up through the EN pin and the WAKE input pin.
DEVICE POWER-UP (AWAKE TRANSITIONAL MODE)
At system power-up (VSUP rises from zero), the 33399 automatically switches into the "Awake" mode (refer to Figure 10 below and Table 5 on page 13. It switches the INH pin in HIGH state to VSUP level. The microcontroller of the application then confirms the Normal mode by setting the EN pin HIGH.
DEVICE WAKE-UP EVENTS
The device can be awakened from Sleep mode by three wake-up events:
The application can wake up with the activation of an external switch. Refer to Table 1, 8-SOICN Pin Definitions on page 3.
Power-Up/ Down
VPWR < 7.0 V VPWR > 7.0 V VPWR < 7.0 V VPWR < 7.0 V
LIN Bus or WAKE Pin Wake-Up
Sleep
Awake
EN HIGH
Normal 1.0 to 20 kbps
EN HIGH (Local Wake-Up Event)
EN LOW
Note Refer to Table 5 for explanation. Figure 10. Operational and Transitional Modes State Diagram
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FUNCTIONAL DEVICE OPERATION PROTECTION AND DIAGNOSIS FEATURES
Table 5. Explanation of Operational and Transitional Modes State Diagram
Operational/ Transitional Sleep Mode Awake Normal Mode LIN Recessive state, driver off. 20 A pullup current source. Recessive state, driver off. Driver active. 30 k pullup active. INH LOW HIGH HIGH EN LOW LOW HIGH TXD X X LOW to drive LIN bus in dominant. HIGH to drive LIN bus in recessive. X = Don't care. RXD High impedance. LOW. Report LIN bus level: * LOW LIN bus dominant * HIGH LIN bus recessive
PROTECTION AND DIAGNOSIS FEATURES ELECTROSTATIC DISCHARGE (ESD)
The 33399 has two Human Body Model ESD values. All pins can handle 4.0 kV. The LIN bus pin, with respect to ground, can handle 5.0 kV.
ELECTROMAGNETIC COMPATIBILITY RADIATED EMISSION ON LIN BUS OUTPUT LINE
Radiated emission level on the LIN bus output line is internally limited and reduced by active slew rate control of the output bus driver. Figure 11 shows the results in the frequency range 100 kHz to 2.0 MHz. On the WAKE input pin, an internal filter is implemented to reduce false wake-up during external disturbance.
NOISE FILTERING
Noise filtering is used to protect the electronic module against illegal wake-up spikes on the bus. Integrated receiver filters suppress any high-frequency (HF) noise induced into the bus wires. The cut-off frequency of these filters is a compromise between propagation delay and HF suppression.
ELECTROMAGNETIC IMMUNITY (EMI)
On the LIN bus pin, the 33399 offers high EMI level from external disturbance occurring at the LIN bus pin in order to guarantee communication during external disturbance.
Figure 11. Radiated Emission in Normal Mode
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TYPICAL APPLICATIONS
TYPICAL APPLICATIONS
The 33399 can be configured in several applications. Figures 12 and 13 show slave and master node applications. An additional pullup resistor of 1.0 k in series with a diode must be added when the device is used in the master node.
External Switch
VPWR
VREG Regulator 12V 5.0V 5.0 V LIN Bus
LIN INH VDD I/O EN Wake-Up Regulator Control
INH
WAKE
33399
VSUP
VREF Bias
30 k
MCU
Logic RXD Protection TXD Receiver
M
Actuator Driver SCI
Driver
GND
Figure 12. Slave Node Typical Application with WAKE Input Switch and INH (Switchable 5.0 V Regulator)
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TYPICAL APPLICATIONS
VPWR
External Switch Master Node Pullup
Regulator 12V 5.0V
INH
5.0 V
WAKE
33399
VSUP
1.0 k
5.0 V
VDD IRQ I/O I/O(2)
EN
VREF Bias
30 k
MCU
M
Logic RXD Receiver Protection TXD Driver LIN
Actuator Driver SCI
GND
Figure 13. Master Node Typical Device Application with MCU Wake-Up from Stop Mode (Non-Switchable 5.0 V Regulator, MCU Stop Mode)
LIN Bus
Wake-Up Regulator Control
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REFERENCE DOCUMENTS
REFERENCE DOCUMENTS
Table 6. Reference Documents
Title Local Interconnect Network (LIN) Physical Interface: Difference Between MC33399 and MC33661 LIterature Order Number EB215
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PACKAGING PACKAGE DIMENSIONS
PACKAGING
PACKAGE DIMENSIONS
Important For the most current revision of the package, visit www.freescale.com and do a keyword search on the 98A drawing number below.
D SUFFIX EF SUFFIX (Pb-FREE) 8-PIN SOIC NARROW BODY PLASTIC PACKAGE 98ASB42564B ISSUE U
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REVISION HISTORY
REVISION HISTORY
REVISION 7.0
DATE 7/2006
DESCRIPTION OF CHANGES
8.0
10/2006
* * * * *
Implemented Revision History page Added Pb-Free suffix code EF Added EPP ordering part number MCZ33399EF/R2 Adjusted to the Freescale prevailing form and style Removed Peak Package Reflow Temperature During Reflow (solder reflow) parameter from MAXIMUM RATINGS on page 4. Added note with instructions to obtain this information from www.freescale.com.
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MC33399 Rev. 8.0 10/2006

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